Up to now, and quite deliberately, I had practically ignored the transmit path in favour of the receive path. Now let's look closer.  Just in case.



The transmit signal at 2nd IF is generated by the DSP, emerging from the CODEC DAC. It is switched between feeding the speaker amplifier on Rx and the modulator on Tx.  On Tx the complex IF signal is padded to produce a uniform modulated output signal by using a SOT resistor (RX) with the published setup procedure. Then it is buffered in a voltage follower consisting of a TL072 (IC606a) driving complementary bipolar output transistors (TR604, TR606)  that are in the opamp feedback loop. The high-power output configuration is presumably to allow driving 50R, which the opamp cannot do alone. The buffered signal then couples via C632 (220n) and the bus switch IC604, feeding to the 'LF arm' of the diplexer and hence to the 2nd mixer 'LF-PORT' (MixAdaptor, not shown) for up-conversion to 10.7MHz.

Buffer Output Loading

The signal from the buffer is at low impedance, not the 50R that one might expect. The source impedance at moderate frequencies is very close to zero because of the 100% overall negative feedback. However, at 15kHz the series capacitor C632 (220nF) fortuitously has Xc of 48R, so maybe there really is a fortuitous 50R source impedance (but only at 15kHz). The diplexer filter output capacitor is 100nF; it is driven by the buffer with the wanted 15kHz.

At 15kHz, the 100nF has Zc of 106R, quite low but not awful. The impedance at the images is much lower. At the first image (33kHz) the Zc is 48R, at the higher images it will be correspondingly less. At the same time as Xc of this capacitor reduces, so does Xc of C632, placing a strenuous load on the buffer at the high frequencies. I think that the only reason that the buffer doesn't oscillate parasitically with the large capacitive load is that the bus switch series on-resistance fortuitously buffers it (spec is about 8 to 10R). This is not really a satisfactory situation.

Another way of looking at this: The output of the buffer IC606A+TR604+TR605 feeds through C632 (220nF) and C631 (220nF) in series, i.e. 110nF. This then feeds to C651 (100nF). Ignoring the LC arm of the filter for a moment, the path above is a capacitive attenuator. Only half the signal appears at C651, frequency independently for a capacitive divider. The load is actually the resonant complex filter, so it is not this simple, but you probably get the idea; signal is being lost because of the unnecessarily low value coupling capacitors, whilst there is no formal impedance control (although providing it is not difficult).
The low values are not, as we might think, an attempt to shape the audio response. The incremental amplitude change at 3kHz each side of 15kHz is quite small, but also subject to selected sideband (one way it boosts at 3kHz, the other way it cuts) and the near-15kHz point in any case corresponds to an audio modulation frequency of zero - the small effect is therefore inconsistent with any audio frequency shaping we might contemplate. This shaping is done in the DSP software, quite rightly.

This capacitive behaviour occurs because the filter is being driven at its output, which is highly capacitive. The 'L' style of  filter is not reciprocal, so driving it 'backwards' at the output may not give the expected results. In the Rx direction, the input is (should be) an inductor and the output a capacitor; hf products are (should be) blocked by the inductor and not drive the capacitor (but see my earlier ramblings about the shunt cap on the inductor). The HF arm of the diplexer is intended to be the 10nF+47R at the mixer port.  If the diplexer has been rebuilt as per my recommendations above, this situation will prevail.

The transmit buffer directly drives 100nF with the synthesised 15kHz Tx IF waveform. The CODEC should have removed the image frequencies, and even if some remain then the roofer would remove them. But the amplifier stability with a capacitive load is questionable, so some changes may be desired. An inductive element would be better.

Fortunately, I have already proposed this in conjunction with the receive-side filtering.

What I think is more than useful is to increase C632 (220nF) so that it is no longer providing the 50R source impedance at 15kHz. As it is, any residual HF noise and images pass easily, but the Xc of 48R at 15kHz is attenuating the very signal that we need. We would prefer a bigger capacitor value and a 'real' resistor, which will stay 50R even at higher frequencies. Both could mount in series at an angle off the existing C632 pad. Of course, the image frequencies at the buffer output would then no longer drive into a low impedance capacitive load, but the new resistor, so it kills 2 birds with one mod.

For a revised C632,  >2u2 as before is a minimum value, with Xc(15kHz) of 5R. Bigger value is better; I used one of my 10uF ceramics. If it is electrolytic, the +ve side should connect to the emitters of TR604, TR606. But remember to fit 47R in series...

Whilst pondering on this, it struck me that the charging path for this capacitor is into the FST3125 pin. At switch-on the path is configured as 'receive', so the switch is off. The normal d.c. state for the buffer output, asssuming exact components and no power-on glitches, is half the +10V rail (due to R628, R629), so there is a 5v transfer to the FST. The absolute maximum input voltage is +7v; there seems to be no normal rail clamp diode, so the situation is just about OK.

After agonising for a while on whether to make any changes at all, I gave in. Although it is obvious that many Stars have been built using the original design and without reported problems, this in itself does not mean that everything is correct.

As I looked more deeply into the original design, it crossed my mind that not making changes is not really an option anyway.

It really seemed as if there should be an inductive arm for the Transmit opamp buffer to see, so that at high frequencies it wouldn't be seeing a capacitive load. I know that putting a 10u and 47R in series at the buffer output, to replace C632, will let the source be '50R' at all frequencies, and isolate any capacitive load due to the filter, but I quite wanted to at least convey a vestige of symmetry to the filter.  The extra rolloff pole might be useful, too.

The entire Transmit 2nd IF path is modelled below, also but Elsie has allowed me to model the 'T' filter in both transmit & receive directions. In the plots I have set the inductor Q to 50, which has required a 10% larger value for the capacitor (now 220nF) than with the higher original Q of 250. If this remains at 200nF, the input impedance rises; this is mainly visible in the reverse (transmit) direction when it rises from 50R to 58R at 15kHz. This is unlikely to be a real problem in practice, so I have used two 100nF in parallel as before. In any case, the lower value keeps the gain up at slightly higher frequencies, which is not a bad thing.

Tx '2nd IF' response with 'T' filter and 50R source

This response is all we might hope for.

Buffer Amp

Surely this is OK? After all, it has been built by many STAR constructors over the years. Nevertheless, we need to look into it even if the outcome is 'no change'.

If you look at the circuit of the buffer amplifier above, you will see that the bipolar complementary output stage of the buffer amp is surprisingly asymmetrical, with a 470R pullup on the NPN side and 3k3 pulldown on the PNP.

The TL072 amplifier is only specified to drive a load in excess of 2k, which is clearly not happening here. It is driving much less, 470R//3k3.

Consider the static state with +5v on the opamp "+" input from the potential divider R628 & R629 (both 10k). The output on the emitters will (should) be at +5V also, by follower action. What our circuit is doing is drawing around 10mA through the 470R and pushing 1.5mA down the 3k3. The balance of 8.5mA must flow into the opamp output. Statically no significant current, maybe a few microamps leakage, flows in the bases or into the load because it is A.C. coupled and at rest.

The load spec of >2k for the amplifier relates to its ability to source & sink current. This is limited by on-chip resistors at the outputs; 64R in series with each emitter and 128R from their junction to the output pin (from TI Datasheet) which amounts to an output resistance of 192R for the chip, as well as any active current-limiting (short-circuit protection).  This is the resistive part through which the surplus 8.5mA flows, dropping 1.6V and dissipating 14mW. The remainder is dissipated in the PNP chip output transistor, 3.4V at 8.5mA being 30mW.

If the input level varies (due to signal from the CODEC), the output must change also. But in this configuration, the opamp's internal PNP is doing all the work; the internal NPN never passes any current.
In addition, the current in the PNP shifts the internal operating point of the opamp, by requiring it to have a substantial 'no-signal' output of -8.5mA.

I have no idea why the asymmetry is present in this circuit (which is cloned from DSP-10). It pulls more current through the Vbe-offsetting diode D605, so will increase the forward drop and is more likely to over-compensate the Vbe of TR604. If static current flows through TR604, either it must also flow through TR606 or the 100% -ve feedback loop will rupture, since it cannot alter the diode current without shifting opamp output voltage and cannot shift opamp output without also shifting the emitters voltage away from mid-point, which is required by the -ve feedback.

The original clone source, the DSP-10, has somewhat the same circuitry:

However, you will notice two rather significant differences in the diagram above:

1. The output NPN/PNP pair is powered from +5V, rather than STAR at 10V,
2. The op-amp is an LM358M; STAR uses a TL072

These differences are important. The reduced (5V) supply produces only half as much current in the 470R (R28 above) for the op-amp to sink.
Also the LM358 internal circuitry does not have any resistance in series with the PNP device, so it is better able to sink that current without voltage drop.


The danger of cloning circuitry is revealed again! In this case, a handy implementation was almost cloned, but the items that were inadvertently altered have seriously affected the operation.

The Buffer is Bad after all!

Having decided to leave the buffer alone, on the basis that others have used it apparently with no problem, I actually took a 'scope probe and looked at waveforms from the DSP CODEC output (using the CW key to produce a steady signal) and had a big surprise.

The waveform from the CODEC is a perfect sinewave at 14.2514kHz.
This is the waveform present at the C657 end of the setup resistor RX (see Glenn's schematics or the scrap above).

A sinewave at 14.2514kHz and amplitude about 2.5Vpp from the CODEC.
This is with the signal level set at 100% for this band (actually 40m).

The signal is attenuated by my 'Set-on-test' resistor Rx, but still looks sinusoidal, so I haven't shown it here.

However, the op-amp output clips the -ve peaks badly (actually it clips them very well, but it shouldn't):

And the emitter followers TR604, TR606 look like this:

Note especially that the op-amp output and emitters have virtually identical waveforms.



So what?

The emitter followers are within the 100% feedback path (voltage follower) of the buffer. This is highly significant: if the PNP emitter follower (TR606) were running out of steam and could not pull the load negative enough, thereby clipping the waveform, the op-amp output would not do the same, but would shoot more negative in an attempt at making the emitter output (and thereby the opamp inverting input) go more negative. But it doesn't - it sticks.
So it is actually the op-amp output that is unable to go more negative.
This may not be surprising, since in order to go negative it has to sink even more current from the 470R (R604). For every volt it goes below mid-rail, it needs to sink another 2.13mA from R604. Even at mid-rail (quiescent state) it is sinking 8.5mA (see sums above), so it is already way beyond the TL072 device spec, which says that with a 2k load (the smallest load indicated) at 25degC it will drive an output of just above 3Vpk with split 10V (+-5V) supply, typically. Even then this is not part of the main spec, but it is seen on the graph (Figure 6 in the datasheet) for output swing vs frequency. This output of 3.5Vp into 2k is, of course, 1.75mA. We blow 8.5mA into it even when quiescent; no wonder it can't manage even more to take the bases of the buffer transistors much lower than mid-rail!

So the -ve peak clipping is categorically not due to transistor limiting in TR606, but is entirely due to output overload of the op-amp IC606A because of the 470R R604, whose value and purpose I have already wondered at before.
I once said "if it works then leave well alone."
But it doesn't work. Not properly, or well.

So what can we do to make the buffer work without clipping?

First, it would not be a bad idea to look at the architecture.
The overall buffer is a 100% feedback non-inverting amplifier (voltage follower). We do not need to give it gain, so this is fine.  The overall 100% feedback around the whole circuit is good, because it makes the op-amp work to correct any shortcomings (such as crossover distortion) as best it can.

We should try hard to remove the resistive asymmetry of R604, R615 (470R, 3k3). If these can be the same high value, then when quiescent no current will flow into the opamp (except unbalance current) so the present need to sink considerable current at all times will be removed and the op-amp can work in the 'usual' manner. If we can make the resistors R604, R615 both at least 4k then the combined resistive load would be 2k, which is within the device specification.

We can take a look now to see how small in value those resistors actually need to be.

We are driving the output into notionally 100R (50R source resistance, a physical resistor for my mod as described, or Xc of a 220nF which is 48R at 15kHz, plus a load which we would expect to be 50R - the reconstruction filter). In fact, both the original filter/diplexer and my modification can present less than 50R, so let us call that part 0R (it can't be much less!). So our buffer should drive 50R, assuming that my modification is done, or a capacitive load if not. Even the capacitive load of the original filter is buffered somewhat by the on-resistance of the Bus Switch, one section having a resistance of at least 4R (considerably more with the original switch bias).

To drive 50R with the emitter followers, and assuming a waveform of 2.5Vpp as in the CODEC output 'scope-trace above (CODEC maximum DAC swing is actually 2.83Vpp), then each transistor must pull or push the peak voltage (1.25V) into 50R. This must be comfortable, with no overload or distortion.

The peak load current is therefore (Vpk / Rload) = 1.25V / 50R =  25mA.
This is the emitter current of a bipolar transistor, 2N3904 or 2N3906, as emitter follower. Current gains are:
2N3904:  min h_FE = 40 at Ic = 0.1mA; 70 at 1mA; 60 at 50mA, for Vce = 1V.
2N3906:  min h_FE = 60 at Ic = 0.1mA, 80 at 1mA;  60 at 50mA, for Vce = 1V.

Since we seek resistor symmetry, let's assume both transistors are as bad as the NPN, and that they have h_FE of 60 (because maximum current gain is needed when the output voltage and current is highest in magnitude). The maximum load current is 25mA, so using the 50mA figure for h_FE, where hFE is falling, is reasonable. This is our minimum specified h_FE, not 'typical'.

The base resistor is the only source of current into the base, since the diodes prevent the op-amp driving base current (the op-amp can only 'steal' current).

If the op-amp output is at mid-rail (quiescent), then due to the symmetry equal current flows in each base resistor, none into the op-amp and none into the bases (or only a tiny value). As the signal input appears, it wants the emitters to slew to 1.25V away from their mid-level, in turn as the signal goes from +ve to -ve peak. The op-amp output will do what is within its power to make the emitters achieve this, by changing its voltage as necessary. Such is the effect of negative feedback.

For either transistor emitter to drive the necessary 25mA into the load on a peak, it will need a base current of (25mA / h_FE) =  25mA / 60, or 0.417mA, let's call it 0.4 for convenience. In fact it will be fractionally less, because the 0.417mA base current also flows into the load, but we can ignore this as it is a small proportion of 25mA.

Now the million dollar question is: can the 0.4mA be made available by a realistic base resistor, which we have said would be well chosen at >4k?

Well, can it?

If the signal is moving by 1.25V, then both resistors change current since the diodes node voltage must also change. Assume a -ve peak (just because...). The emitter junction must move negative by 1.25V, to keep the feedback loop intact. Each base will also move negative by a tad more than 1.25V, but it is OK to call it 1.25V for now. The difference is due to the internal resistances of the transistor base & emitters, including intrinsic resistance and diode resistance. So the diode junction also moves -ve by 1.25V. The current in R604 rises by a bit, and that in R615 falls by approximately the same bit.
Is the current in R615 enough to drive 0.4mA into the base of TR606? Well, the base is 0.6V (approx, Vbe) less positive than the emitter for the PNP transistor, and the emitter  need to be 1.25V below quiescient, which is mid-rail 5V. The voltage across R615 will therefore be (5V -1.25V -0.6V) which is 3.15V at the negative peak, and because we have guessed it at 4k the current in it will be (3.15V / 4k) = 0.79mA. We want to take 0.4mA into the base, which leaves the opamp and R604 between them to mop up the remaining 0.4mA (OK, I rounded again, it's 0.39mA really!). At least there is some to mop up, so we win.

Having done this, we can easily see that 4k is very reasonable. If it were 8k, we would be on the verge of running out of base current, but as it is, we have 0.4mA in hand, perfectly fine.
The similar argument applies on the +ve peak, but the directions of all voltages and currents invert.

This all sounds rather convincing, but what about all this current that needs 'mopping up'?  All I said was that "the other half and the op-amp will take care of it". But how do they do this? What happens to the spare 0.4mA?

Because the op-amp output nominally follows the output voltage (assuming that the transistor Vbe's are compensated exactly by the diode forward drops), then the current in the 'other' resistor will change also. None will flow into the other transistor base; that transistor is not contributing to the peak output current. Instead of that resistor passing it's quiescent current of (5V - 0.6V(diode)) / 4k (for a 4k resistor) it will now pass (5V - 0.6V(diode) + 1.25V(signal)) /4k which is 1.413mA. The other resistor is only passing 0.4mA into its diode, the rest goes into the transistor base as we saw.
So 0.4mA of the 1.413mA can pass straight into the opposite resistor, leaving 1.013mA unaccounted for. Where does it go? The op-amp kindly mops it up, since his only desire is that the whole circuit should balance in this condition, short-lived though it may be.

Because the op-amp in this simple design is at worst driving two resistors each of 4k in parallel, it is within the manufacturers specification. We could slightly reduce the resistors, maybe, since the diodes D605 & D606 reduce their effect by reducing their load current. In fact, everything seems perfect!

What our simple design has not done (yet) is to put a resistor in each transistor emitter, the junction being the output of the circuit. These resistors pad the ever-changing intrinsic emitter resistance of 26R/Iemitter[mA] so that the emitter (and hence collector) current does not tend to 'run away' to the point where the transistor is destroyed, in the event of a slight residual base current being passed if the base diode happens to have a larger forward voltage than the transistor Vbe. Even our op-amp includes these - see the 64R in the equivalent circuit below:

Do we need these emitter resistors? And do we need a more sophisticated anti-crossover bias scheme than the present two diodes?

Really, yes.
This would be good design practice, and would avoid needing to hope that no quiescent current flows in the transistors that might cause a thermal runaway. Also, do we need distortion?

But it is more difficult to implement than simply changing the values of two resistors. There are no spare pads for the emitter resistors, so they would need fitting into the emitter legs of each transistor. Any changes to the simple 2-diode biassing might need extra components either in place of the diodes, or in their leads.  

Maybe, if we have sanitised the op-amp output requirement enough, we can leave some crossover to be taken care of by the 100% feedback loop, hoping that the voltage 'gap' will not be excessive and that the op-amp output can slew rapidly over it. After all, we are only interested in 15kHz ± 2kHz for our SSB '2nd IF', anything else will be removed by filters (the CODEC spec,  our nice new reconstruction filter and the roofing filter). So maybe crossover distortion is not the same unpleasant problem that it is in a wideband audio amplifier? We could try it and see, (it is no worse than the original design for this) or we can add lots of components as described above to avoid any problems.
I'm going to suck it & see.

The first buffer modification

We have gone a long way round, in order to do a proper design on this circuit. All that has actually happened is that we have ended up with different values for two resistors. So what is the change?
Simples! We replace both R604 (470R) and R615 (3k3) with 4k or thereabouts. 3k9 sounds good; 4k7 would probably be OK but we may run short of base current. The op-amp no longer has to sink 8.5mA quiescent, nor operate way outside it's spec, nor is half of it's output stage inactivated by the current it always sinks. Everything is balanced and the op-amp can do it's job as I presume was originally intended.

If we wanted to put emitter resistors and better quiescent biassing parts in place, it would be rather more difficult to implement, although distortion would reduce somewhat and we would be protected from thermal runaway.
But let's try it first without these; after all, being inside a (now) fully functional 100% negative feedback loop will reduce distortion greatly, and so long as the biassing ensures quiescent non-conduction of the transistors then we will not get thermal runaway. Fingers crossed... 

It works well, with no clipping of -ve peaks using the same setup as above. There is, however, flattening of the +ve peaks. This was actually there before, but the horrific -ve peak clipping overshadowed it. Hmmm.

Positive Peak Clipping

The +ve peak clipping looks like this at the output pin (pin 1) of the op-amp IC606A. It is not explained by any figures calculated above. Are my sums wrong, or does it come from somewhere else (I am prejudiced into thinking it must be somewhere else, of course). You can also just see the crossover points of the output stage, at the graticule centre X-axis. I have kept the range knobs in view for clarity.


If you have by chance already read my discussion on biassing levels for bus switches, you may guess what is coming.  I wrote the bus-switch bit some time before finding this first-hand example! Ah well, at least I already know the cure.
If you look at what I said about biassing bus-switches at mid rail, you may agree with my conclusion that it is the Wrong Thing To Do. This is a good demonstration!

The output from the DAC is a signal of 2.83Vpp at full wallop (data-sheet spec). This, due to ac coupling and mid-rail biassing on IC604 (FST3125) results in a signal swinging from (2.5V - 1.42V) to (2.5V + 1.42V), which positive level goes above the turn-off threshold of the bus switch FET (see the bus switch section; it turns off completely at 1.5V below the +ve supply, i.e. +3.5V. TI parts have a worse threshold than Fairchild).
Well, 2.5V + 1.42V is 3.92V for the signal, but the FET is off with around 3.5V!  Also, the FET on-resistance has been increasing exponentially as the voltage approches this level, but since this switch is not in a 50R path the effect is not severe until it is really and finally 'off'.
The flattening of the waveform above, at the output of the switch, occurs at 3.7V, a bit more than it might be but clearly it is turning off and causing clipping, exactly as I said it would! Because this is not a 50R circuit but several kOhmhs, the clipping shows suddenly as the FET actually pinches off. If it were a 50R path there would have been severe non-linearity at somewhat lower levels.

Does it improve after altering the bias point?

Of course it does! Here are two 'after' images. After I fitted a 5k6 in parallel with R631 (10k) to shift the bias point from 2.5V to 1.3V. As you can readily see, the clipping is gone. No surprises. The d.c. coupled trace of the bus-switch IC604 pin 8 shows the new bias point. The waveform neither reaches cut-off nor goes below 0V, as it will not for anything other than a large asymmetrical waveform (where the capacitive coupling causes much more signal to appear on one or other side ofthe mean value - this is inevitable in this design).

It does happen!
In fact, 'you' have made it as severe as possible by the setup you performed! In the Tx calibration, you fitted a value for 'RX' that ensures that, on the band with lowest output (from the PA), the DAC output level is at maximum. On the other bands, where less signal is needed for full output, you adjust it downwards with the per-band settings, which scale the digital drive to the DAC. But what you did was to ensure that the maximum possible signal reaches the bus switch - giving most likelihood of this clipping mechanism occurring. Had you set 'RX' to zero and used digital scaling to reduce the DAC signal, the DAC level would be less and the problem may be invisible. Also, the negative peak clipping happens. It is a designed-in 'feature'. Take a look.

OK, now that I have found this first-hand manifestation of a bus-switch biassing problem that I had already predicted, and successfully applied the cure (but only to this one position...) I am ready to modify and try out the proper crossover biassing of the buffer. At last!
Properly implemented crossover biassing should remove that visible 'kink' in the output waveform at the mid-point of the sinusoidal test signal, and at the same time make the stage safe from thermal runaway.

The second modification: safe biassing

I am unhappy that the complementary NPN/PNP output pair are biassed solely from the drop in 2 diodes, with no formal crossover biassing and no prevention of excessive offsets causing thermal runaway (the transistors are directly across the 10V supply). We can only hope that it remains in Class B. If the transistors warm up enough that their combined Vbe drops below the forward conduction drop of the two diodes, then current will flow through the transistors directly from the +10V rail to ground. This would increase the temperature and therefore h_FE of the transistors and hence further increase the current whilst reducing r_e. This is thermal runaway; a recipe for transistor destruction. That it appears so far not to have happened is a miracle, not a manifestation of good design.

What is needed, if we are not to penny-pinch and take unnecessary risks, is some padding resistance in the emitter of each transistor, and a formal method for causing some quiescent current to flow (to prevent crossover distortion). Ideally this should be possible to implement reversibly on the present PCB. Also, it would be excellent if no adjustment pot (common in audio amplifier designs) were needed. Let's try...

Since the diodes and transistors are all wire-ended, it is reasonable to add components into the circuit.
By adding four resistors as shown below (R9, R10, R11, R12), the criteria are met:


This works as follows (remember we tend to start at the output with op-amp circuits!):
When quiescent, no current flows from the output (labelled Vamp) through the 2u2 capacitor.

Please bear in mind that the values I have used are, so far, just a 'guess' at what we might end up with. We might need to change them once the sums are done.

The op-amp has two inputs.
On the '+' input is a mid-rail (+5V) bias due to the two 10k resistors and the 10V supply.
On the '-' input is the same level as on the point 'Vamp' at the amp output.
The op-amp will try to alter its output voltage to make these the same; such is the nature of feedback circuits.
I have shown an op-amp output resistor R13 of 1R, this was to allow me to experiment with op-amp output resistance tolerances and is set at 1R to effectively disable it.

Because the Q1, Q2 and associated components circuitry is symmetrical, Vamp will be at mid-rail when the op-amp output is also at mid-rail, i.e. no current is drwan through the op-amp output in order to achieve this nominal balance (some may flow in order to correct slight imbalance, but it will be small).
Since no current flows in the Filter (d.c. is blocked by C1 in the above diagram) and an insignificant amount flows in the op-amp output, we can calculate voltages & currents. I will assume that, at least nominally, the diode forward drop is equal to the transistor Vbe for now and that each is 0.6V. Later we can correct this assumption.

The current in the network R1, R9, D1, D2, R10, R2 is therefore easy to calculate since it flows from +10V to ground.  It is (10V - [2 x 0.6V] / (3k3 + 62R +62R +3k3) = (8.8V / 6724R) = 1.31mA
So the surplus voltage on each base is the drop in 62R due to 1.31mA flowing; 81.22mV
This causes base current to flow in each transistor emitter. Because we have nominally offset the Vbe against the diode drop, the current that will flow (provided h_FE will support it) is (81.22mV / 10R), since the excess voltage appears across the 10R emitter resistors, i.e. the quiescent current is (81.22mV / 10R) mA = 8.122mA (ignoring intrinsic emitter resistance for now).

Since the transistor h_FE is >60,  <0.13mA base current is needed in order to obtain this emitter current, so the 1.31mA in the base network is not greatly affected. This is good.
If variations (e.g. mismatch or thermal effects) occur, any change in the conditions will reflect in a change in quiescent transistor bias current from 8.122mA. Even if the Vbe and diode-drops mismatch by ±50mV, the quiescent emitter currents will only alter by ±5mA from the nominal values. In the original design, complete thermal runaway was possible under such conditions.  So we have considered the diode/Vbe match assumption made earlier and found it to be reasonable and to cope with at least ±50mV mismatch.

We should consider re of the transistors. This emitter resistance is made up from the physical resistance of the bond wires and leads, plus the dynamic resistance of the device. The latter is the more significant at low current, and is roughly  (26R / Ie[mA]).  At our quiescent current of 8mA, this becomes (26/8) = 3.5 Ohms. This is lower than the physical resistors (for which I suggested 10R) which is a good sign.  In this calculation I have deliberately ignored any contribution from the base circuit resistance, partly because this is not just a simple resistor but is a complex circuit including the op-amp. Simulation will take care of this later.

Now, if an external input to the op-amp '+' pin appears, the op-amp output will try to move the network mid-point in such a way and by such an amount as will produce the same signal on the '-' input, because of the high open-loop gain of the op-amp and the nature of feedback circuits. If a 1V positive change occurs on the '+' pin, the op-amp will try to produce the same +1V change at the output. To do this, it must move its own output by more than 1V positive because there are two resistive attenuators: the 62R against the 3k3 (which is very little) and the 10R against the load of maybe 50R (which is not so little). The op-amp output will have to swing more than 1V positive by roughly 10R / 50R for a 50R load, or 200mV (note that the load is nominally 100R, made from the output series resistance (source R) and the nominal load resistance in series, but for safety we are considering a load of 50R).

Since the op-amp output with +-5V supplies (ours is 'split' 10V) and 2k load is shown as nominally ±3V under these conditions, (datasheet figure 6) we should be OK for an input swing of ± (3V x 50/60) even for a 50R load, i.e. a swing of ±2.5V into 50R. The CODEC maximum output is 1.42Vpk; this is trimmed down by 'RX' and cannot exceed 1.42V anyway, so our design is sound even with a 50R load (we have introduced a series 47R into the load already, making nearer 100R, so this is very safe).

I mentioned "penny-pinching" earlier. In my book, the addition of four small conventional wire-ended resistors is not an expensive thing to do. Making the modification to add them is a bit tricky, but why were they not in the original design (and hence present in the copper tracking)?

Thermal calculations

The quiescent power dissipation in each output transistor is around (8.122mA x 5V), i.e. 45mW, which is well below the transistor maximum of 600mW derated at 5mW/°C above 25C.
With thermal resistance of junction-ambient of 200°C/Watt, the junction rise at 45mW is (200 x 45/1000)°C, only 9°C, which is trivial, so our quiescent bias does not much contribute to device temperature. At peak signal output, assuming a squarewave (which is the worst possible condition), the output current into the load will be 1.42V / 50R (again assuming a shorted filter), 28.4mA. Adding this to the quiescent 8mA and assuming that the transistor still has 5V dropped (it is less for a resistive load), then the worst-case possible device dissipation is 5V x 28.4mA for half the time, and maybe the quiescent current for the other half, when the opposite transistor conducts signal into the load, i.e. a dissipation of 71mW + 45mW.
This resulting 116mW will raise temperature by 23.2°C above ambient, leaving plenty in hand. Derating at 5mW/°C above 25°C, this allows us a local ambient of up to around 125°C, which sounds like no problem!

These 'extra' resistors can be fitted in-line with the existing component leads, especially if tiny wire-ended resistors are used. This fulfills my requirement for minimum intrusion.

Oh, the simulated response of the whole circuit above is:

The green line shows the op-amp gain rolloff with frequency due to it's internal unity-gain compensation; it it the voltage between the op-amp input pins.
Light blue is the buffer output, and dark blue is the filter output. The LF rolloff is due to the coupling capacitors. Note that it is flat (almost) at 15kHz but cuts the first image at 33kHz by at least 10dB, as a conventional reconstruction filter should.

Schematic of buffer showing the modifications

Glenn has once again kindly altered his schematic of this area to show the changes:

Real measurement of modified buffer

There's nothing like seeing it work, to bear out all that theory!
I (actually Jackie, my XYL, since I have a few bruises at present) modified my PCB by adding parts as in the schematic. We used different but similar spec transistors, BC337 (NPN) and BC327 (PNP) because I cut out the original 2N3904 & 2N3906 to avoid damage to the PCB, and had no more of them. The pinning on my substitutes is reversed relative to the case moulding, but that is easily dealt with by mounting them 180deg rotated. So long as your preferred part has no less h_FE it will probably be OK!

Here is a photo:


The 10R's are mounted vertically in the emitter holes in the PCB, taken up the outside of the TR case and soldered to the bent-up emiter pin. I used miniature 10R but had none in 62R so used larger parts, as you can see.

This is the 'scope picture of the op-amp output, no crossover nicks:

Compare this with the first modification, that didn't use class AB biassing.


And similarly at the final output, the emitter side of C632, no distortion, no surprise:


They look almost identical, because there is now no crossover distortion; the feedback loop does not need to try to leap a crossover 'gap' at each mid-point.

The level of quiescent current as designed is 8.122mA, but the actual value is quite rightly highly dependent on the precise forward-drops of the diodes, the individual transistor Vbe values and the eventual value of re (depending on emitter current).

The acid test is to measure the volt-drop on one of the 10R emitter resistors, with no signal, to see what quiescent current has been achieved in my own amplifier. Yours may differ, but should be a few mA, say 4-12mA, depending on diode-to-transistor variation.
I measured 52mV, corresponding to a quiescent bias of 5.2mA. The design value, which assumed identical drops in the transistor Vbe and the diodes, and made no allowance for re, was 8.122mA. If we had also allowed 3.5R of re in series with each 10R emitter resistor, the expectation would reduce from 8.122mA to 5.9mA - but the re at 5.9mA would be higher - so achieving 5.2mA is very satisfactory.
The level of quiescent current is good for a low-power circuit of this type, and the anti-crossover bias that gives us class AB operation is clearly all present and correct.

For the addition of 4 resistors and some altered values (and maybe, like me, a new pair of transistors after cutting out the originals in order to avoid damage to the PCB), we have now got rid of any distortion and, overall, done it like it should have been.

So should we all add these modifications?

The answer is the same as it always is, with a bit more bite this time.
It is entirely your own choice. It is your PICASTAR, not mine. What I have presented is not, and never will be, an 'official modification'.

I have presented all the information, including full design calculations, in good faith, to help you decide. There are 'scope traces of various levels of 'before' and 'after' where these are helpful. There is simulation output. You decide.  Bear in mind that by modifying your STAR with any of these changes you will make it 'non-standard'. I can not offer any support.
I would respectfully suggest that the Tx buffer changes should definitely be done, since the 'standard' design distorts terribly and unnecessarily. If you want to minimise the mods, at least replace R604 (470R) with 3k3 to match R615 (3k3) and solder a 5k6 above R631. Not the full monty, quite easy to do, and at least it will remove from the Tx Buffer that severe peak clipping that is a 'feature' of the standard design. But while you are doing that, why not do the full thing! 

What next?

Now all that is necessary is to check that there are no problems introduced into the Receive side...

This done, and happy that the changes have not caused problems, we can return to the overall description with a reasonable solution available.